S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 193

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S1D13705

Manufacturer Part Number
S1D13705
Description
S1d13705 Embedded Memory Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet

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Epson Research and Development
Vancouver Design Center
Panel Power Tab
13705CFG Configuration Program
Issue Date: 01/03/29
Hardware Power
Save Enable
The S5U13705B00C evaluation board is designed to use the GPIO0 signal to control the
LCD bias power. The following settings allow configuration of the necessary delays.
Hardware Power Save Enable
Power Down Time Delay
When this box is checked, Hardware Power Save using
GPIO0 is enabled. When this box is unchecked, the
Hardware Power Save function is not available.
This setting controls the time delay between when the
LCD panel is powered-off and when the S1D13705
control signals are turned off. This setting must be
configured according to the specification for the panel
being used.
This value is only used by Epson evaluation software
designed for the S5U13705B00C evaluation board.
Power Down
Time Delay
Power Up
Time Delay
X27A-B-001-02
S1D13705
Page 15

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