S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 59
S1D13705
Manufacturer Part Number
S1D13705
Description
S1d13705 Embedded Memory Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1D13705.pdf
(480 pages)
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Vancouver Design Center
1. Ts
2. t6min
3. t8 min = [((REG[06h] bits 1-0, REG[05h] bits 7-0)+1) + (REG[0Ah] bits 6-0)] Lines
4. t10min = [((REG[04h] bits 6-0)+1) x 8] Ts
5. t14min = [((REG[04h] bits 6-0)+1) x 8] Ts
6. t15min = [(REG[07h] bits 4-0) x 8 + 16] Ts
7. t17min = [(REG[08h] bits 4-0) - (REG[07]) x 8 + 16] Ts
Hardware Functional Specification
Issue Date: 01/05/22
Symbol
t10
t11
t12
t13
t14
t15
t16
t17
t1
t2
t3
t4
t5
t6
t7
t8
t9
= pixel clock period
= [((REG[04h] bits 6-0)+1) x 8 + ((REG[08h] bits 4-0)+4) x 8] Ts
Shift Pulse period
Shift Pulse pulse width high
Shift Pulse pulse width low
data setup to Shift Pulse falling edge
data hold from Shift Pulse falling edge
Line Pulse cycle time
Line Pulse pulse width low
Frame Pulse cycle time
Frame Pulse pulse width low
horizontal display period
Line Pulse setup to Shift Pulse falling edge
Frame Pulse falling edge to Line Pulse falling
edge phase difference
DRDY to Shift Pulse falling edge setup time
DRDY pulse width
DRDY falling edge to Line Pulse falling edge
DRDY hold from Shift Pulse falling edge
Line Pulse Falling edge to DRDY active
Parameter
Table 7-17: TFT/D-TFD A.C. Timing
t6 - 18Ts
note 7
note 2
note 3
note 4
note 5
note 6
Min
0.5
0.5
0.5
0.5
2t6
0.5
0.5
0.5
1
9
Typ
Max
250
X27A-A-001-09
(note 1)
Units
S1D13705
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Page 53
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