S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 67

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S1D13705

Manufacturer Part Number
S1D13705
Description
S1d13705 Embedded Memory Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet

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Epson Research and Development
Vancouver Design Center
bit 7
bits 5-0
.
bits 5-0
Hardware Functional Specification
Issue Date: 01/05/22
REG[0Ah] Vertical Non-Display Period
Address = 1FFEAh
REG[0Bh] MOD Rate Register
Address = 1FFEBh
Vertical Non-
Display
Status
n/a
n/a
n/a
Note
Vertical Non-Display Status
This bit =1 during the Vertical Non-Display period.
Vertical Non-Display Period
These bits specify the vertical non-display period. This register is programmed as follows:
MOD Rate Bits [5:0]
When the value of this register is 0, the MOD output signal toggles every FPFRAME. For
a non-zero value, the value in this register + 1 specifies the number of FPLINEs between
toggles of the MOD output signal. These bits are for passive LCD panels only.
This register should be set only once, on power-up during initialization.
Vertical Non-
VerticalNonDisplayPeriod lines
Period Bit 5
MOD Rate
Display
Bit 5
Vertical Non-
Period Bit 4
MOD Rate
Display
Bit 4
Vertical Non-
Period Bit 3
MOD Rate
Display
=
Bit 3
REG[0Ah] bits [5:0]
Vertical Non-
Period Bit 2
MOD Rate
Display
Bit 2
Vertical Non-
Period Bit 1
MOD Rate
Display
Bit 1
Vertical Non-
Read/Write
Read/Write
Period Bit 0
X27A-A-001-09
MOD Rate
Display
Bit 0
S1D13705
Page 61

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