S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 39

• Manufacturer Part Number: S1D13705
• Description: S1d13705 Embedded Memory Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Epson Research and Development
Vancouver Design Center
7.1.6 Generic #2 Interface Timing
Hardware Functional Specification
Issue Date: 01/05/22
Symbol
WE#,RD#
T
A[16:0]
D[15:0]
f
D[15:0]
BCLK
BHE#
(write)
WAIT#
BCLK
t10
t11
BCLK
(read)
t1
t2
t3
t4
t5
t6
t7
t8
t9
CS#
Bus Clock frequency
Bus Clock period
A[16:0], BHE#, CS# valid to WE#, RD# low
WE#, RD# high to A[16:0], BHE#, CS# invalid
WE# high to D[15:0] invalid (write cycle)
BCLK to WAIT# high
WE# low to D[15:0] valid (write cycle)
RD# low to D[15:0] driven (read cycle)
D[15:0] valid to WAIT# high (read cycle)
RD# high to D[15:0] high impedance (read cycle)
WE#, RD# low to WAIT# driven low
WE#, RD# high to WAIT# high impedance
WAIT# high to WE#, RD# high
T
BCLK
Hi-Z
Hi-Z
Hi-Z
Note
t1
BCLK may be turned off (held low) between accesses - see Section 13.5, “Turning Off
BCLK Between Accesses” on page 83
t8
t5
t3
Parameter
Table 7-6: Generic #2 Timing
Figure 7-6: Generic #2 Timing
VALID
t9
VALID
t6
1T
1/f
Min
BCLK
BCLK
0
0
0
0
t11
VALID
T
Max
BCLK
50
16
10
14
10
11
t2
t4
t10
t7
X27A-A-001-09
Units
MHz
S1D13705
ns
ns
ns
ns
ns
ns
ns
ns
ns
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Hi-Z
Hi-Z