S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 64

• Manufacturer Part Number: S1D13705
• Description: S1d13705 Embedded Memory Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Page 58
bit 3
bit 2
bits 1-0
S1D13705
X27A-A-001-09
REG[03h] Mode Register 2
Address = 1FFE3h
n/a
n/a
LCDPWR Override
This bit is used to override the panel on/off sequencing logic. When this bit = 0, LCDPWR
and the panel interface signals are controlled by the sequencing logic. When this bit 1,
LCDPWR is forced to off and the panel interface signals are forced low immediately upon
entering power save mode. See Section 7.3.2, “Power Down/Up Timing” on page 36 for
further information.
Hardware Power Save Enable
When this bit = 1 GPIO0 is used as the Hardware Power Save input pin. When this bit = 0,
GPIO0 operates normally.
Software Power Save Bits [1: 0]
These bits select the Power Save Mode as shown in the following table.
Refer to Section 13, “Power Save Modes” on page 81 for a complete description of the
power save modes.
RESET#
State
0
1
1
1
1
Bit 1
Table 8-6: Software Power Save Mode Selection
0
0
1
1
n/a
Hardware Power
Save Enable
REG[03h] bit 2
Table 8-5: Hardware Power Save/GPIO0 Operation
X
0
0
0
1
Bit 0
0
1
0
1
n/a
GPIO0 Config
REG[18h] bit 0
Software Power Save
LCDPWR
Override
X
X
0
1
1
Normal Operation
reserved
reserved
Mode
reads pin status
Status/Control
Power Save
Hardware
REG[19h] bit 0
Enable
GPIO0
X
X
0
1
Epson Research and Development
Hardware Functional Specification
Power Save
Software
Bit 1
Hardware Power Save
Vancouver Design Center
GPIO0 Operation
GPIO0 Output = 0
GPIO0 Output = 1
Input (active high)
(high impedance)
GPIO0 Input
Issue Date: 01/05/22
Read/Write
Power Save
Software
Bit 0