S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 278

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S1D13705

Manufacturer Part Number
S1D13705
Description
S1d13705 Embedded Memory Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet

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Page 8
2 Installation and Configuration
S1D13705
X27A-G-005-03
S1-1
S1-2
S1-3
S1-4
S1-5
S1-6
Switch
CNF0
CNF1
CNF2
CNF3
ADDR
GPIO0
Signal
S1-3
The S1D13705 has four configuration inputs, CNF[3:0], which are read on the rising edge
of RESET# and are fully configurable on this evaluation board. One six-position DIP
switch is provided on the board to configure the four configuration inputs, select the
S5U13705B00C memory/register start address, and enable/disable hardware power save
mode.
The following settings are recommended when using the S5U13705B00C with the ISA
bus.
0
0
0
0
1
1
1
1
1
1
= recommended settings (configured for ISA bus support)
= recommended settings (configured for ISA bus support)
See “Host Bus Selection” table below
Little Endian
Memory/Register Start Address = C0000h
Hardware Suspend Disable
S1-2
Table 2-1: Configuration DIP Switch Settings
0
0
1
1
0
0
1
1
1
1
Closed (0 or low)
Table 2-2: Host Bus Selection
S1-1
0
1
0
1
0
1
0
0
1
1
S5U13705B00C Rev. 1.0 ISA Bus Evaluation Board User Manual
BS#
X
X
X
X
X
X
0
1
0
1
See “Host Bus Selection” table below
Big Endian
Memory/Register Start Address = F00000h
Hardware Suspend Enable
SH-4 bus interface
SH-3 bus interface
reserved
MC68K bus interface #1, 16-bit
reserved
MC68K bus interface #2, 16-bit
reserved
reserved
Generic #1, 16-bit
Generic #2, 16-bit
Epson Research and Development
Open (1 or high)
Host Bus Interface
Vancouver Design Center
Issue Date: 01/02/13

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