S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 101

• Manufacturer Part Number: S1D13705
• Description: S1d13705 Embedded Memory Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Epson Research and Development
Vancouver Design Center
2.3 Frame Rate Calculation
Programming Notes and Examples
Issue Date: 01/02/13
Register
[0A]
[0B]
[0C]
[0D]
[0E]
[1A]
[1B]
[1C]
[01]
[02]
[03]
[04]
[05]
[06]
[07]
[08]
[09]
[0F]
[10]
[11]
[12]
[13]
[15]
[17]
[18]
[19]
1100 0000 (C0)
1110 1111 (EF)
1111 1111 (FF)
0010 0011 (23)
0000 0011 (03)
0010 0111 (27)
0000 0000 (00)
0000 0000 (00)
0000 0000 (00)
0000 0000 (00)
0000 0011 (03)
0000 0000 (00)
0000 0000 (00)
0000 0000 (00)
0000 0000 (00)
0000 0000 (00)
0000 0000 (00)
0000 0000 (00)
0000 0011 (03)
0000 0000 (00)
0000 0000 (00)
0000 0000 (00)
0000 0000 (00)
0000 0000 (00)
Value (hex)
Frame rate specifies the number of complete frame which are drawn on the display in one
second. Configuring a frame rate that is too high or too low adversely effects the quality of
the displayed image.
System configuration imposes certain non-variable limitations. For instance the width and
height of the display panel are fixed as is, typically, the input clock to the S1D13705. From
the following formula it is evident that the two variables the programmer can use to adjust
frame rate are horizontal and vertical non-display periods.
Select a passive, Single, Color panel with an 8-bit data width
Select 8-bit per pixel color depth
Select normal power operation
Vertical non-display period = REG[0A] = 3 lines
Screen 1 / Screen 2 Start Address MSB - set to 0
Set the scratch pad bits to “0”.
Horizontal display size = (Reg[04]+1)*8 = (39+1) * 8 = 320 pixels
Vertical display size = Reg[06][05] + 1
= 0000 0000 1110 1111 + 1 = 239 +1 = 240 lines
FPLINE start position (only required for TFT configuration)
Horizontal non-display period = (Reg[08] + 4) * 8
FPFRAME start position (only required for TFT configuration)
MOD rate is only required by some monochrome panels
Screen 1 Start Address - set to 0 for initialization
Screen 2 Start Address - set to 0 for initialization
Memory Address offset - not virtual setup - so set to 0
Set the vertical size to the maximum value.
Leave the LUT alone for now
GPIO control and status registers - set to “0”.
This is not portrait mode so set this register to “0”.
Line Byte Count is only required for portrait mode.
Table 2-1: S1D13705 Initialization Sequence
Notes
= 4 * 8 = 32 pixels
Frame Rate Calculation
Frame Rate Calculation
Split Screen on page 31
Split Screen on page 31
Virtual Display on page 25
Split Screen on page 31
Look-Up Table (LUT) on
page 15
Introduction To Hardware
Rotation on page 37
See Also
X27A-G-002-02
S1D13705
Page 9