S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 26

• Manufacturer Part Number: S1D13705
• Description: S1d13705 Embedded Memory Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Page 20
5.2.2 LCD Interface
S1D13705
X27A-A-001-09
FPDAT[10:8]
FPDAT[7:0]
Pin Names
FPFRAME
Pin Name
FPDAT11
RESET#
WAIT#
RD#
Type
Type
O
O,
IO
O,
IO
I
I
O
O
30, 31, 32,
33, 34, 35,
24, 25, 26
Pin #
36, 37
Pin #
76
73
2
23
39
Cell
TS2
CS
CS
CN3
CN3
CN3
CN3
Cell
RESET#
State
Input
Hi-Z
RESET#
0
State
Input
Input
0
0
This pin has multiple functions.
See Table 5-2: “Host Bus Interface Pin Mapping,” on page 22 for
summary.
This pin has multiple functions.
See Table 5-2: “Host Bus Interface Pin Mapping,” on page 22 for
summary.
Active low input to set all internal registers to the default state and
to force all signals to their inactive states.
• For SH-3/SH-4 mode, this pin inputs the read signal (RD#).
• For MC68K #1, this pin must be tied to IO V
• For MC68K #2, this pin inputs the bus size bit 1 (SIZ1).
• For Generic #1, this pin inputs the read command for the
• For Generic #2, this pin inputs the read command (RD#).
• For SH-3 mode, this pin outputs the wait request signal
• For SH-4 mode, this pin outputs the device ready signal
• For MC68K #1, this pin outputs the data transfer
• For MC68K #2, this pin outputs the data transfer and size
• For Generic #1, this pin outputs the wait signal (WAIT#).
• For Generic #2, this pin outputs the wait signal (WAIT#).
Panel Data
These pins have multiple functions.
These pins should be connected to IO V
See Table 5-3: “LCD Interface Pin Mapping,” on page 23 for
summary.
This pin has multiple functions.
This pin should be connected to IO V
Table 5-3: “LCD Interface Pin Mapping,” on page 23 for
summary.
Frame Pulse
lower data byte (RD0#).
(WAIT#).
(RDY#).
acknowledge signal (DTACK#).
acknowledge bit 1 (DSACK1#).
• Panel Data bits [10:8] for TFT/D-TFD panels.
• General Purpose Input/Output pins GPIO[3:1].
• Panel Data bit 11 for TFT/D-TFD panels.
• General Purpose Input/Output pin GPIO4.
• Inverse Video select pin.
Description
Description
Epson Research and Development
Hardware Functional Specification
DD
Vancouver Design Center
DD
when unused. See
Issue Date: 01/05/22
when unused.
DD
.