S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 61

• Manufacturer Part Number: S1D13705
• Description: S1d13705 Embedded Memory Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Epson Research and Development
Vancouver Design Center
bit 4
bit 3
bit 2
bits 1-0
Hardware Functional Specification
Issue Date: 01/05/22
REG[01h] bit 7
TFT/STN
0
1
Color/Mono
REG[01h] bit 5
0
1
FPLINE Polarity
This bit controls the polarity of FPLINE in TFT/D-TFD mode (no effect in passive panel
mode). When this bit = 0, FPLINE is active low. When this bit = 1, FPLINE is active high.
FPFRAME Polarity
This bit controls the polarity of FPFRAME in TFT/D-TFD mode (no effect in passive
panel mode). When this bit = 0, FPFRAME is active low. When this bit = 1, FPFRAME is
active high.
Mask FPSHIFT
FPSHIFT is masked during non-display periods if either of the following two criteria is
met:
Data Width Bits [1:0]
These bits select the display data format. See Table 8-1: “Panel Data Format” below for a
comprehensive description of panel selection.
X (don’t care)
Dual/Single
REG[01h] bit 6
1. Color passive panel is selected (REG[01h] bit 5 = 1)
2. This bit (REG[01h] bit 2) = 1
0
1
0
1
REG[01h] bit 1
Data Width
Table 8-1: Panel Data Format
Bit 1
0
1
0
1
0
1
0
1
REG[01h] bit 0
Data Width
Bit 0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Color Single 8-bit passive LCD format 1
Color Single 8-bit passive LCD format 2
Mono Single 4-bit passive LCD
Mono Single 8-bit passive LCD
Color Single 4-bit passive LCD
Mono Dual 8-bit passive LCD
Color Dual 8-bit passive LCD
12-bit TFT/D-TFD panel
9-bit TFT/D-TFD panel
Function
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
X27A-A-001-09
S1D13705
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