S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 69

• Manufacturer Part Number: S1D13705
• Description: S1d13705 Embedded Memory Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Epson Research and Development
Vancouver Design Center
bits 7-0
.
REG[13h] bits 1-0
REG[12h] bits 7-0
Hardware Functional Specification
Issue Date: 01/05/22
REG[11h] Memory Address Offset Register
Address = 1FFF1h
REG[12h] Screen 1 Vertical Size Register (LSB)
Address = 1FFF2h
REG[13h] Screen 1 Vertical Size Register (MSB)
Address = 1FFF3h
Vertical Size
Offset Bit 7
Screen 1
Memory
Address
Bit 7
n/a
Vertical Size
Offset Bit 6
Screen 1
Address
Memory
Bit 6
n/a
Memory Address Offset Bits [7:0] (Landscape Modes Only)
This register is used to create a virtual image by setting a word offset between the last
address of one line and the first address of the following line. If this register is not equal to
zero, then a virtual image is formed. The displayed image is a window into the larger vir-
tual image. See Figure 8-1: “Screen-Register Relationship, Split Screen,” on page 64.
This register has no effect in SwivelView modes. See “REG[1Ch] Line Byte Count Regis-
ter for SwivelView Mode” on page 67.
Screen 1 Vertical Size Bits [9:0]
This register is used to implement the Split Screen feature of the S1D13705. These bits
determine the height (in lines) of Screen 1.
In landscape modes, if this register is programmed with a value, n, where n is less than the
Vertical Panel Size (REG[06h], REG[05h]), then lines 0 to n of the panel contain Screen 1
and lines n+1 to REG[06h], REG[05h] of the panel contain Screen 2. See Figure 8-1:
“Screen-Register Relationship, Split Screen,” on page 64. If Split Screen is not desired,
this register must be programmed greater than, or equal to the Vertical Panel Size,
REG[06h] and REG[05h].
In SwivelView modes this register must be programmed greater than, or equal to theVerti-
cal Panel Size, REG[06h] and REG[05h]. See “SwivelView™” on pag e76.
Vertical Size
Offset Bit 5
Screen 1
Address
Memory
Bit 5
n/a
Vertical Size
Offset Bit 4
Screen 1
Address
Memory
Bit 4
n/a
Vertical Size
Offset Bit 3
Screen 1
Address
Memory
Bit 3
n/a
Vertical Size
Offset Bit 2
Screen 1
Address
Memory
Bit 2
n/a
Vertical Size
Vertical Size
Offset Bit 1
Screen 1
Screen 1
Address
Memory
Bit 1
Bit 9
Read/Write
Read/Write
Read/Write
Vertical Size
Vertical Size
X27A-A-001-09
Offset Bit 0
Screen 1
Screen 1
Address
Memory
Bit 0
Bit 8
S1D13705
Page 63