S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 21

• Manufacturer Part Number: S1D13705
• Description: S1d13705 Embedded Memory Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Epson Research and Development
Vancouver Design Center
4 Functional Block Diagram
4.1 Functional Block Descriptions
4.1.1 Host Interface
4.1.2 Memory Controller
4.1.3 Sequence Controller
Hardware Functional Specification
Issue Date: 01/05/22
Generic MPU
MC68K
SH-3
SH-4
Register
Bus Clock
Host
The Host Interface provides the means for the CPU/MPU to communicate with the display
buffer and internal registers.
The Memory Controller arbitrates between CPU accesses and display refresh accesses. It
also generates the necessary signals to control the SRAM frame buffer.
The Sequence Controller controls data flow from the Memory Controller through the Look-
Up Table and to the LCD Interface. It also generates memory addresses for display refresh
accesses.
I/F
Figure 4-1: System Block Diagram Showing Data Paths
Memory Clock
40k x 16-bit SRAM
Memory
Controller
Power Save
Clocks
Sequence Controller
Pixel Clock
Look-Up
Table
LCD
I/F
X27A-A-001-09
LCD
S1D13705
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