S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 88

• Manufacturer Part Number: S1D13705
• Description: S1d13705 Embedded Memory Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Page 82
13.3 Power Save Mode Function Summary
13.4 Panel Power Up/Down Sequence
S1D13705
X27A-A-001-09
Note
After chip reset or when entering/exiting a power save mode, the Panel Interface signals
follow a power on/off sequence shown below. This sequence is essential to prevent damage
to the LCD panel.
When FPDAT[11:8] are designated as GPIO outputs, the output state prior to enabling
the Power Save Mode is maintained. When FPDAT[11:8] are designated as GPIO in-
puts, unused inputs must be tied to either IO V
face Pin Mapping,” on page 23.
Look-Up Table Registers Access Possible?
FPDAT[11:0], FPSHIFT (see note)
Sequence Controller Running?
FPLINE, FPFRAME, DRDY
Memory Access Possible?
IO Access Possible?
Display Active?
Table 13-4: Power Save Mode Function Summary
LCDPWR
Power Save
Forced Low
Forced Low
DD
Hardware
Inactive
or GND - see Table 5.5 “LCD Inter-
No
No
No
No
No
Epson Research and Development
Power Save
Hardware Functional Specification
Forced Low
Forced Low
Software
Inactive
Yes
Yes
No
No
No
Vancouver Design Center
Issue Date: 01/05/22
Normal
Active
Active
Active
Yes
Yes
Yes
Yes
Yes