MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 1014
MC9S12G
Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12G.pdf
(1160 pages)
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192 KByte Flash Module (S12FTMRG192K2V1)
27.4.7.1
The Flash module uses the CCIF flag in combination with the CCIE interrupt enable bit to generate the
Flash command interrupt request. The Flash module uses the DFDIF and SFDIF flags in combination with
the DFDIE and SFDIE interrupt enable bits to generate the Flash error interrupt request. For a detailed
description of the register bits involved, refer to
(FCNFG)”,
Status Register
The logic used for generating the Flash module interrupts is shown in
27.4.8
The Flash module is not affected if the MCU enters wait mode. The Flash module can recover the MCU
from wait via the CCIF interrupt (see
27.4.9
If a Flash command is active (CCIF = 0) when the MCU requests stop mode, the current Flash operation
will be completed before the MCU is allowed to enter stop mode.
1014
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Section 27.3.2.6, “Flash Error Configuration Register
Wait Mode
Stop Mode
Description of Flash Interrupt Operation
Vector addresses and their relative interrupt priority are determined at the
MCU level.
(FSTAT)”, and
DFDIE
DFDIF
SFDIE
SFDIF
CCIE
CCIF
Figure 27-27. Flash Module Interrupts Implementation
Section 27.3.2.8, “Flash Error Status Register
MC9S12G Family Reference Manual,
Section 27.4.7,
Section 27.3.2.5, “Flash Configuration Register
NOTE
“Interrupts”).
Flash Command Interrupt Request
Flash Error Interrupt Request
(FERCNFG)”,
Rev.1.01
Figure
27-27.
(FERSTAT)”.
Section 27.3.2.7, “Flash
Freescale Semiconductor
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