MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 282

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

S12S Debug Module (S12SDBG)
8.1.5
8.2
There are no external signals associated with this module.
8.3
8.3.1
A summary of the registers associated with the DBG sub-block is shown in
descriptions of the registers and bits are given in the subsections that follow.
282
Address
0x0020
0x0021
0x0022
0x0023
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
TAGHITS
SECURE
CPU BUS
READ TRACE DATA (DBG READ DATA BUS)
External Signal Description
Memory Map and Registers
DBGTCR
Block Diagram
Module Memory Map
DBGSR
DBGC1
DBGC2
Name
W
W
W
W
R
R
R
R
1
Bit 7
ARM
TBF
0
0
COMPARATOR A
COMPARATOR C
COMPARATOR B
Figure 8-2. Quick Reference to DBG Registers
Figure 8-1. Debug Module Block Diagram
MC9S12G Family Reference Manual,
TSOURCE
TRIG
6
0
0
0
5
0
0
0
0
MATCH1
MATCH2
MATCH0
BDM
4
0
0
0
CONTROL
MATCH
LOGIC
TAG &
DBGBRK
Rev.1.01
3
0
0
TRCMOD
TRANSITION
STATE
BREAKPOINT REQUESTS
Figure
SSF2
2
0
0
TO CPU
TRACE BUFFER
TAGS
8-2. Detailed
STATE SEQUENCER
Freescale Semiconductor
STATE
SSF1
1
0
TRACE
CONTROL
TRIGGER
COMRV
ABCM
TALIGN
SSF0
Bit 0