MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 598

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Serial Communication Interface (S12SCIV5)
18.4.8
In loop operation the transmitter output goes to the receiver input. The RXD pin is disconnected from the
SCI.
Enable loop operation by setting the LOOPS bit and clearing the RSRC bit in SCI control register 1
(SCICR1). Setting the LOOPS bit disables the path from the RXD pin to the receiver. Clearing the RSRC
bit connects the transmitter output to the receiver input. Both the transmitter and receiver must be enabled
(TE = 1 and RE = 1).
18.5
18.5.1
See
18.5.2
18.5.2.1
Normal mode of operation.
To initialize a SCI transmission, see
18.5.2.2
SCI operation in wait mode depends on the state of the SCISWAI bit in the SCI control register 1
(SCICR1).
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This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Section 18.3.2, “Register
If SCISWAI is clear, the SCI operates normally when the CPU is in wait mode.
If SCISWAI is set, SCI clock generation ceases and the SCI module enters a power-conservation
state when the CPU is in wait mode. Setting SCISWAI does not affect the state of the receiver
enable bit, RE, or the transmitter enable bit, TE.
Initialization/Application Information
Loop Operation
Reset Initialization
Modes of Operation
Run Mode
Wait Mode
In single-wire operation data from the TXD pin is inverted if RXPOL is set.
In loop operation data from the transmitter is not recognized by the receiver
if RXPOL and TXPOL are not the same.
Figure 18-31. Loop Operation (LOOPS = 1, RSRC = 0)
Descriptions”.
MC9S12G Family Reference Manual,
Transmitter
Section 18.4.5.2, “Character
Receiver
NOTE
NOTE
Transmission”.
Rev.1.01
RXD
TXD
Freescale Semiconductor