MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 896

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

96 KByte Flash Module (S12FTMRG96K1V1)
25.4.6
This section provides details of all available Flash commands launched by a command write sequence. The
ACCERR bit in the FSTAT register will be set during the command write sequence if any of the following
illegal steps are performed, causing the command not to be processed by the Memory Controller:
If a Flash block is read during execution of an algorithm (CCIF = 0) on that same block, the read operation
will return invalid data if both flags SFDIF and DFDIF are set. If the SFDIF or DFDIF flags were not
previously set when the invalid read operation occurred, both the SFDIF and DFDIF flags will be set.
If the ACCERR or FPVIOL bits are set in the FSTAT register, the user must clear these bits before starting
any command write sequence (see
25.4.6.1
The Erase Verify All Blocks command will verify that all P-Flash and EEPROM blocks have been erased.
Upon clearing CCIF to launch the Erase Verify All Blocks command, the Memory Controller will verify
that the entire Flash memory space is erased. The CCIF flag will set after the Erase Verify All Blocks
operation has completed. If all blocks are not erased, it means blank check failed, both MGSTAT bits will
be set.
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1
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
As found in the memory map for FTMRG96K1.
Starting any command write sequence that programs or erases Flash memory before initializing the
FCLKDIV register
Writing an invalid command as part of the command write sequence
For additional possible errors, refer to the error handling table provided for each command
Register
FSTAT
Flash Command Description
Erase Verify All Blocks Command
A Flash word or phrase must be in the erased state before being
programmed. Cumulative programming of bits within a Flash word or
phrase is not allowed.
Table 25-31. Erase Verify All Blocks Command FCCOB Requirements
CCOBIX[2:0]
MGSTAT1
MGSTAT0
Table 25-32. Erase Verify All Blocks Command Error Handling
ACCERR
Error Bit
FPVIOL
000
MC9S12G Family Reference Manual,
Set if CCOBIX[2:0] != 000 at command launch
None
Set if any errors have been encountered during the read
Set if any non-correctable errors have been encountered during the read
blank check failed.
Section
25.3.2.7).
0x01
CAUTION
FCCOB Parameters
Error Condition
Rev.1.01
Not required
1
or if blank check failed .
Freescale Semiconductor
1
or if