MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 1126

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Detailed Register Address Map
0x0070–0x09F Analog to Digital Converter (ADC)
1126
Address
0x008A-
0x008C-
0x008E-
0x009A-
0x009C-
0x009E-
0x0080-
0x0082-
0x0084-
0x0086-
0x0088-
0x0090-
0x0092-
0x0094-
0x0096-
0x0098-
0x007A
0x007B
0x007C
0x007D
0x007E ATDCMPHTH
0x008B
0x008D
0x009B
0x009D
0x007F
0x0091
0x0083
0x0085
0x0087
0x0089
0x008F
0x0091
0x0093
0x0095
0x0097
0x0099
0x009F
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
ATDCMPHTL
ATDSTAT2H
ATDSTAT2L
ATDDIENH
ATDDIENL
ATDDR10
ATDDR11
ATDDR12
ATDDR13
ATDDR14
ATDDR15
ATDDR0
ATDDR1
ATDDR2
ATDDR3
ATDDR4
ATDDR5
ATDDR6
ATDDR7
ATDDR8
ATDDR9
Name
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Bit 7
MC9S12G Family Reference Manual,
Bit 6
and
and
and
and
and
and
and
and
and
and
and
and
and
and
and
and
See
See
See
See
See
See
See
See
See
See
See
See
See
See
See
See
Section 14.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 14.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 14.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 14.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 14.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 14.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 14.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 14.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 14.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 14.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 14.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 14.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 14.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 14.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 14.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 14.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 14.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 14.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 14.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 14.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 14.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 14.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 14.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 14.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 14.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 14.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 14.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 14.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 14.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 14.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 14.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 14.3.2.12.1, “Left Justified Result Data (DJM=0)”
Bit 5
Bit 4
CMPHT[15:8]
CMPHT[7:0]
CCF[15:8]
IEN[15:8]
CCF[7:0]
IEN[7:0]
Rev.1.01
Bit 3
Bit 2
Freescale Semiconductor
Bit 1
Bit 0