MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 462

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MC9S12G

Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Analog-to-Digital Converter (ADC12B16CV2)
14.3.2.9
This read-only register contains the Conversion Complete Flags CCF[15:0].
Read: Anytime
Write: Anytime, no effect
462
Module Base + 0x0008
Module Base + 0x000A
CMPE[15:0]
Reset
Reset
Field
15–0
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
W
W
R
R
15
15
0
0
Compare Enable for Conversion Number n (n= 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0) of a Sequence
(n conversion number, NOT channel number!) — These bits enable automatic compare of conversion results
individually for conversions of a sequence. The sense of each comparison is determined by the CMPHT[n] bit in
the ATDCMPHT register.
For each conversion number with CMPE[n]=1 do the following:
CCF[n] in ATDSTAT2 register will flag individual success of any comparison.
0 No automatic compare
1 Automatic compare of results for conversion n of a sequence is enabled.
ATD Status Register 2 (ATDSTAT2)
= Unimplemented or Reserved
= Unimplemented or Reserved
1) Write compare value to ATDDRn result register
2) Write compare operator with CMPHT[n] in ATDCPMHT register
14
14
0
0
13
13
0
0
Figure 14-10. ATD Compare Enable Register (ATDCMPE)
12
Figure 14-11. ATD Status Register 2 (ATDSTAT2)
0
0
Table 14-17. ATDCMPE Field Descriptions
MC9S12G Family Reference Manual,
11
11
0
0
10
10
0
0
0
0
9
9
CMPE[15:0]
CCF[15:0]
0
0
8
8
Description
0
0
7
7
0
0
6
6
Rev.1.01
0
0
5
5
0
0
4
4
0
0
3
3
Freescale Semiconductor
2
0
2
0
0
0
1
1
0
0
0
0

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