MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 1086
MC9S12G
Manufacturer Part Number
MC9S12G
Description
Ignores external trigger. Performs one conversion sequence and stops.
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12G.pdf
(1160 pages)
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Electrical Characteristics
1086
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
1
2
3
Onlly available on S12GN16, S12GN32, S12GN48, S12G48, and S12G64
Only available on S12G192, S12GA192, S12G340, and S12GA240
Only available on S12GA192 and S12GA240
Table A-10. Peripheral Configurations for Run & Wait Current Measurement
Peripheral
COP & RTI
MSCAN
ACMP
PWM
DAC
RVA
ADC
DBG
TIM
SPI
SCI
3
2
1
MC9S12G Family Reference Manual,
Configured to loop-back mode using a bit rate of 1Mbit/s
Configured to master mode, continuously transmit data
(0x55 or 0xAA) at 1Mbit/s
Configured into loop mode, continuously transmit data
(0x55) at speed of 57600 baud
Configured to toggle its pins at the rate of 40kHz
The peripheral is configured to operate at its maximum
specified frequency and to continuously convert voltages on
all input channels in sequence.
The module is enabled and the comparators are configured
to trigger in outside range.The range covers all the code
executed by the core.
The peripheral shall be configured to output compare mode,
pulse accumulator and modulus counter enabled.
Both modules are enabled.
The module is enabled with analog output on. The ACMPP
and ACMPM are toggling with 0-1 and 1-0.
DAC0 and DAC1 is buffered at full voltage range
(DACxCTL = $87).
The module is enabled and ADC is running at 6.25MHz with
maximum bus freq
Configuration
Rev.1.01
Freescale Semiconductor
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