MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 1122

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Detailed Register Address Map
0x001A–0x001B Device ID Register (PARTIDH/PARTIDL)
0x001C–0x001F Port Integration Module (PIM) Map 3 of 6
0x0020–0x002F Debug Module (DBG)
1122
Address
Address
Address
0x001A
0x001B
0x001C
0x001D
0x001E
0x001F
0x0020
0x0021
0x0022
0x0023
0x0024
0x0025
0x0026
0x0027
0x0028
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
DBGSCRX
DBGACTL
DBGBCTL
DBGCCTL
ECLKCTL
Reserved
Reserved
DBGMFR
PARTIDH
DBGTCR
DBGTBH
DBGCNT
PARTIDL
DBGTBL
DBGSR
DBGC1
DBGC2
IRQCR
Name
Name
Name
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
1
NECLK
TBF
Bit 15
IRQE
ARM
Bit 7
Bit 7
Bit 7
Bit 7
SZE
SZE
TBF
0
0
0
0
0
0
0
MC9S12G Family Reference Manual,
TSOURCE
NCLKX2
IRQEN
Bit 14
TRIG
Bit 6
Bit 6
Bit 6
Bit 6
SZ
SZ
0
0
0
0
0
0
0
0
0
DIV16
Bit 13
Bit 5
Bit 5
Bit 5
Bit 5
TAG
TAG
TAG
0
0
0
0
0
0
0
0
0
EDIV4
Bit 12
Bit 4
Bit 4
Bit 4
BDM
Bit 4
BRK
BRK
BRK
0
0
0
0
0
0
0
0
PARTIDH
PARTIDL
Rev.1.01
DBGBRK
EDIV3
Bit 11
Bit 3
Bit 3
Bit 3
Bit 3
SC3
RW
RW
RW
0
0
0
0
0
0
TRCMOD
CNT
EDIV2
SSF2
Bit 10
RWE
RWE
RWE
Bit 2
Bit 2
Bit 2
MC2
Bit 2
SC2
0
0
0
0
0
Freescale Semiconductor
EDIV1
SSF1
Bit 1
Bit 1
Bit 1
MC1
NDB
Bit 9
Bit 1
SC1
0
0
0
0
0
0
COMRV
ABCM
COMPE
COMPE
COMPE
TALIGN
EDIV0
SSF0
Bit 0
Bit 0
Bit 0
MC0
Bit 8
Bit 0
SC0
0
0
0