MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 530

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Freescale’s Scalable Controller Area Network (S12MSCANV3)
If the WUPE bit in CANCTL0 is not asserted, the MSCAN will mask any activity it detects on CAN.
RXCAN is therefore held internally in a recessive state. This locks the MSCAN in sleep mode. WUPE
must be set before entering sleep mode to take effect.
The MSCAN is able to leave sleep mode (wake up) only when:
After wake-up, the MSCAN waits for 11 consecutive recessive bits to synchronize to the CAN bus. As a
consequence, if the MSCAN is woken-up by a CAN frame, this frame is not received.
The receive message buffers (RxFG and RxBG) contain messages if they were received before sleep mode
was entered. All pending actions will be executed upon wake-up; copying of RxBG into RxFG, message
aborts and message transmissions. If the MSCAN remains in bus-off state after sleep mode was exited, it
continues counting the 128 occurrences of 11 consecutive recessive bits.
16.4.5.6
The MSCAN is in power down mode
When entering the power down mode, the MSCAN immediately stops all ongoing transmissions and
receptions, potentially causing CAN protocol violations. To protect the CAN bus system from fatal
consequences of violations to the above rule, the MSCAN immediately drives TXCAN into a recessive
state.
In power down mode, all clocks are stopped and no registers can be accessed. If the MSCAN was not in
sleep mode before power down mode became active, the module performs an internal recovery cycle after
powering up. This causes some fixed delay before the module enters normal mode again.
530
•
•
•
•
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
CAN bus activity occurs and WUPE = 1
or
the CPU clears the SLPRQ bit
CPU is in stop mode
or
CPU is in wait mode and the CSWAI bit is set
MSCAN Power Down Mode
The CPU cannot clear the SLPRQ bit before sleep mode (SLPRQ = 1 and
SLPAK = 1) is active.
The user is responsible for ensuring that the MSCAN is not active when
power down mode is entered. The recommended procedure is to bring the
MSCAN into Sleep mode before the STOP or WAI instruction (if CSWAI
is set) is executed. Otherwise, the abort of an ongoing message can cause an
error condition and impact other CAN bus devices.
MC9S12G Family Reference Manual,
(Table
16-38) when
NOTE
NOTE
Rev.1.01
Freescale Semiconductor