MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 644

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Timer Module (TIM16B8CV3)
20.3.2.9
Read: Anytime
Write: Anytime.
Note: Bits related to available channels have functional significance. Writing to unavailable bits has no effect. Read from
20.3.2.10 Timer Interrupt Enable Register (TIE)
644
EDGnB
EDGnA
Reset
Reset
Reset
Field
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
7:0
unavailable bits return a zero.
W
W
W
R
R
R
EDG7B
EDG3B
Input Capture Edge Control — These eight pairs of control bits configure the input capture edge detector
circuits.
C7I
Timer Control Register 3/Timer Control Register 4 (TCTL3 and TCTL4)
0
0
0
7
7
7
EDG7A
EDG3A
C6I
0
0
0
6
6
6
EDGnB
Figure 20-18. Timer Interrupt Enable Register (TIE)
Table 20-12. Edge Detector Circuit Configuration
Figure 20-16. Timer Control Register 3 (TCTL3)
Figure 20-17. Timer Control Register 4 (TCTL4)
0
0
1
1
Table 20-11. TCTL3/TCTL4 Field Descriptions
MC9S12G Family Reference Manual,
EDG6B
EDG2B
C5I
EDGnA
5
0
5
0
5
0
0
1
0
1
EDG6A
EDG2A
Capture on any edge (rising or falling)
C4I
0
0
0
4
4
4
Capture on falling edges only
Capture on rising edges only
Description
Capture disabled
Configuration
EDG5B
EDG1B
C3I
0
0
0
3
3
3
Rev.1.01
EDG5A
EDG1A
C2I
2
0
2
0
2
0
EDG4B
EDG0B
Freescale Semiconductor
C1I
0
0
0
1
1
1
EDG4A
EDG0A
C0I
0
0
0
0
0
0