MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 238

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

S12G Memory Map Controller (S12GMMCV1)
5.3.2.3
Read: Anytime.
Write: Anytime.
The NVMRES bit maps 16k of internal NVM resources (see Section FTMRG) to the global address space
0x04000 to 0x07FFF.
238
Address: 0x0013
NVMRES
DP[15:8]
Reset
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Field
Field
7–0
0
W
R
MOVB
LDY
Direct Page Index Bits 15–8 — These bits are used by the CPU when performing accesses using the direct
addressing mode. These register bits form bits [15:8] of the local address (see
Map internal NVM resources into the global memory map
Write: Anytime
This bit maps internal NVM resources into the global address space.
0 Program flash is mapped to the global address range from 0x04000 to 0x07FFF.
1 NVM resources are mapped to the global address range from 0x04000 to 0x07FFF.
Example 5-1. This example demonstrates usage of the Direct Addressing Mode
MMC Control Register (MMCCTL1)
0
0
7
#$04,DIRECT
<$12
Bit15
= Unimplemented or Reserved
0
0
6
Figure 5-7. MMC Control Register (MMCCTL1)
MC9S12G Family Reference Manual,
Figure 5-6. DIRECT Address Mapping
Table 5-5. DIRECT Field Descriptions
Table 5-6. MODE Field Descriptions
DP [15:8]
5
0
0
;Set DIRECT register to 0x04. From this point on, all memory
;accesses using direct addressing mode will be in the local
;address range from 0x0400 to 0x04FF.
;Load the Y index register from 0x0412 (direct access).
CPU Address [15:0]
0
0
4
Bit8
Description
Description
Bit7
0
0
3
Rev.1.01
2
0
0
Bit0
Figure
Freescale Semiconductor
5-6).
0
0
1
NVMRES
0
0