MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 372

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

S12 Clock, Reset and Power Management Unit (S12CPMU)
10.6
The interrupt/reset vectors requested by the S12CPMU are listed in
specification for related vector addresses and priorities.
10.6.1
10.6.1.1
The clock source for the RTI is either IRCCLK or OSCCLK depending on the setting of the RTIOSCSEL
bit. In Stop Mode with PSTP=1 (Pseudo Stop Mode), RTIOSCSEL=1 and PRE=1 the RTI continues to
run, else the RTI counter halts in Stop Mode.
The RTI can be used to generate hardware interrupts at a fixed periodic rate. If enabled (by setting
RTIE=1), this interrupt will occur at the rate selected by the CPMURTI register. At the end of the RTI
time-out period the RTIF flag is set to one and a new RTI time-out period starts immediately.
A write to the CPMURTI register restarts the RTI time-out period.
10.6.1.2
The S12CPMU generates a PLL Lock interrupt when the lock condition (LOCK status bit) of the PLL
changes, either from a locked state to an unlocked state or vice versa. Lock interrupts are locally disabled
by setting the LOCKIE bit to zero. The PLL Lock interrupt flag (LOCKIF) is set to 1 when the lock
condition has changed, and is cleared to 0 by writing a 1 to the LOCKIF bit.
10.6.1.3
When the OSCE bit is 0, then UPOSC stays 0. When OSCE = 1 the UPOSC bit is set after the LOCK bit
is set.
Upon detection of a status change (UPOSC) the OSCIF flag is set. Going into Full Stop Mode or disabling
the oscillator can also cause a status change of UPOSC.
372
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
Interrupts
Description of Interrupt Operation
Real Time Interrupt (RTI)
PLL Lock Interrupt
Oscillator Status Interrupt
RTI time-out interrupt
Low voltage interrupt
Interrupt Source
Periodical Interrupt
PLL lock interrupt
Oscillator status
Autonomous
interrupt
Table 10-29. S12CPMU Interrupt Vectors
MC9S12G Family Reference Manual,
Mask
CCR
I bit
I bit
I bit
I bit
I bit
CPMUAPICTL (APIE)
CPMUINT (LOCKIE)
CPMULVCTL (LVIE)
CPMUINT (OSCIE)
CPMUINT (RTIE)
Local Enable
Rev.1.01
Table
10-29. Refer to MCU
Freescale Semiconductor