MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 168

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

1
1
Port Integration Module (S12GPIMV0)
2.4.3.6
2.4.3.7
168
Address 0x0005 (G1)
Address 0x0005 (G2, G3)
Address 0x0006 (G1)
Address 0x0006 (G2, G3)
Read: Anytime. The data source is depending on the data direction value.
Write: Anytime
Read: Anytime
Write: Anytime
Field
Reset
Reset
Reset
Reset
7-0
PD
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
W
W
W
W
R
R
R
R
Port D general-purpose input/output data—Data Register
The associated pin can be used as general-purpose I/O. In general-purpose output mode the port data register bit
value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port data register bit, otherwise the
buffered pin input state is read.
DDRC7
PD7
Port D Data Register (PORTD)
0
0
0
Port C Data Direction Register (DDRC)
0
0
0
7
7
7
7
DDRC6
PD6
0
0
0
0
0
0
6
6
6
6
Figure 2-8. Port C Data Direction Register (DDRC)
Table 2-27. PORTD Register Field Descriptions
Figure 2-7. Port D Data Register (PORTD)
MC9S12G Family Reference Manual,
DDRC5
PD5
0
0
0
0
0
0
5
5
5
5
DDRA4
PD4
0
0
0
0
0
0
4
4
4
4
Description
DDRC3
PD3
0
0
0
0
0
0
3
3
3
3
Rev.1.01
DDRC2
PD2
2
0
2
0
0
2
0
2
0
0
Freescale Semiconductor
DDRC1
Access: User read/write
Access: User read/write
PD1
Access: User read only
Access: User read only
0
0
0
0
0
0
1
1
1
1
DDRC0
PD0
0
0
0
0
0
0
0
0
0
0
1
1