MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 362

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

S12 Clock, Reset and Power Management Unit (S12CPMU)
CPMUSYNR, CPMUREFDIV, CPMUCLKS, CPMUPLL, CPMUIRCTRIMH/L and CPMUOSC
Read: Anytime
Write: Anytime
10.3.2.21 Reserved Register
Read: Anytime
Write: Only in Special Mode
362
0x02FC
0x02FB
Reset
Reset
PROT
Field
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
0
W
W
R
R
Clock Configuration Registers Protection Bit — This bit protects the clock configuration registers from
accidental overwrite (see list of affected registers above):
Writing 0x26 to the CPMUPROT register clears the PROT bit, other write accesses set the PROT bit.
0 Protection of clock configuration registers is disabled.
1 Protection of clock configuration registers is enabled. (see list of protected registers above).
0
0
0
0
7
7
This reserved register is designed for factory test purposes only, and is not
intended for general user access. Writing to this register when in Special
Mode can alter the S12CPMU’s functionality.
Figure 10-28. S12CPMU Protection Register (CPMUPROT)
= Unimplemented or Reserved
0
0
0
0
6
6
Figure 10-29. Reserved Register CPMUTEST2
MC9S12G Family Reference Manual,
CPMUTEST2
5
0
0
5
0
0
NOTE
0
0
0
0
4
4
Description
0
0
0
0
3
3
Rev.1.01
2
0
0
2
0
0
Freescale Semiconductor
0
0
0
0
1
1
PROT
0
0
0
0
0