MC9S12G FREESCALE [Freescale Semiconductor, Inc], MC9S12G Datasheet - Page 555

• Manufacturer Part Number: MC9S12G
• Description: Ignores external trigger. Performs one conversion sequence and stops.
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

17.4.2
The main part of the PWM module are the actual timers. Each of the timer channels has a counter, a period
register and a duty register (each are 8-bit). The waveform output period is controlled by a match between
the period register and the value in the counter. The duty is controlled by a match between the duty register
and the counter value and causes the state of the output to change during the period. The starting polarity
of the output is also selectable on a per channel basis. Shown below in
for the PWM timer.
17.4.2.1
Each PWM channel has an enable bit (PWMEx) to start its waveform output. When any of the PWMEx
bits are set (PWMEx = 1), the associated PWM output signal is enabled immediately. However, the actual
PWM waveform is not available on the associated PWM output until its clock source begins its next cycle
due to the synchronization of PWMEx and the clock source. An exception to this is when channels are
concatenated. Refer to
Freescale Semiconductor
Clock Source
This document is valid for the S12G96 and the S12G128 device. All information related to other devices is preliminary.
PWMEx
(Clock Edge
PWM Channel Timers
PWM Enable
Sync)
Gate
The first PWM cycle after enabling the channel can be irregular.
Up/Down
Section 17.4.2.7, “PWM 16-Bit Functions”
8-Bit Counter
Figure 17-16. PWM Timer Channel Block Diagram
PWMCNTx
Q
Q
Reset
MC9S12G Family Reference Manual, Rev.1.01
T
R
NOTE
8-bit Compare =
8-bit Compare =
PWMDTYx
PWMPERx
CAEx
for more detail.
Figure 17-16
Pulse-Width Modulator (S12PWM8B8CV2)
T
R
Q
Q
PPOLx
From Port PWMP
M
U
Data Register
X
is the block diagram
M
U
X
To Pin
Driver
555