UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 10

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

CHAPTER 5 BUS CONTROL FUNCTION .......................................................................................... 167
CHAPTER 6 CLOCK GENERATION FUNCTION .............................................................................. 193
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP) ................................................................ 207
10
4.4
4.5
4.6
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9
5.10
6.1
6.2
6.3
6.4
6.5
4.3.10
4.3.11
Block Diagrams..................................................................................................................... 124
Port Register Settings When Alternate Function Is Used ................................................ 154
Cautions ................................................................................................................................ 162
4.6.1
4.6.2
4.6.3
4.6.4
4.6.5
4.6.6
Features................................................................................................................................. 167
Bus Control Pins................................................................................................................... 168
5.2.1
5.2.2
Memory Block Function....................................................................................................... 169
External Bus Interface Mode Control Function ................................................................. 170
Bus Access ........................................................................................................................... 171
5.5.1
5.5.2
5.5.3
Wait Function ........................................................................................................................ 179
5.6.1
5.6.2
5.6.3
5.6.4
Idle State Insertion Function ............................................................................................... 183
Bus Hold Function................................................................................................................ 184
5.8.1
5.8.2
5.8.3
Bus Priority ........................................................................................................................... 186
Bus Timing ............................................................................................................................ 187
Overview................................................................................................................................ 193
Configuration ........................................................................................................................ 194
Registers ............................................................................................................................... 196
Operation............................................................................................................................... 201
6.4.1
6.4.2
PLL Function......................................................................................................................... 202
6.5.1
6.5.2
6.5.3
Port DH ....................................................................................................................................119
Port DL ....................................................................................................................................121
Cautions on setting port pins ...................................................................................................162
Cautions on bit manipulation instruction for port n register (Pn)...............................................165
Cautions on on-chip debug pins...............................................................................................166
Cautions on P05/INTP2/DRST pin...........................................................................................166
Cautions on P10, P11, and P53 pins when power is turned on ...............................................166
Hysteresis characteristics ........................................................................................................166
Pin status when internal ROM, internal RAM, or on-chip peripheral I/O is accessed...............168
Pin status in each operation mode...........................................................................................168
Number of clocks for access....................................................................................................171
Bus size setting function ..........................................................................................................171
Access by bus size ..................................................................................................................172
Programmable wait function ....................................................................................................179
External wait function...............................................................................................................180
Relationship between programmable wait and external wait ...................................................181
Programmable address wait function.......................................................................................182
Functional outline.....................................................................................................................184
Bus hold procedure..................................................................................................................185
Operation in power save mode ................................................................................................185
Operation of each clock ...........................................................................................................201
Clock output function ...............................................................................................................201
Overview..................................................................................................................................202
Registers..................................................................................................................................202
Usage ......................................................................................................................................206
Preliminary User’s Manual U18953EJ1V0UD