UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 683

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(1) External interrupt falling, rising edge specification register 0 (INTF0, INTR0)
Remark
The INTF0 and INTR0 registers are 8-bit registers that specify detection of the falling and rising edges of the
NMI pin via bit 2 and the external interrupt pins (INTP0 to INTP3) via bits 3 to 6.
These registers can be read or written in 8-bit or 1-bit units.
Reset sets these registers to 00H.
Caution When the function is changed from the external interrupt function (alternate function) to the
Caution Be sure to clear the INTF0n and INTR0n bits to 00 when these registers are not used as the
Remark
INTF0n
For how to specify a valid edge, see Table 19-3.
INTR0
0
0
1
1
INTF0
After reset: 00H
port function, an edge may be detected. Therefore, clear the INTF0n and INTR0n bits to 00,
and then set the port mode.
NMI or INTP0 to INTP3 pins.
n = 2:
n = 3 to 6: Control of INTP0 to INTP3 pins
CHAPTER 19 INTERRUPT/EXCEPTION PROCESSING FUNCTION
INTR0n
Control of NMI pin
0
0
0
1
0
1
R/W
INTF06
INTR06
INTP3
INTP3
Table 19-3. Valid Edge Specification
No edge detected
Rising edge
Falling edge
Both rising and falling edges
Preliminary User’s Manual U18953EJ1V0UD
Address: INTF0 FFFFFC00H, INTR0 FFFFFC20H
INTF05
INTP2
INTR05
INTP2
INTF04
INTR04
INTP1
INTP1
Valid Edge Specification (n = 2 to 6)
INTF03
INTR03
INTP0
INTP0
INTF02
INTR02
NMI
NMI
0
0
0
0
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