UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 316

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

with the count clock, and the counter starts counting. At this time, the output of the TOQ00 pin is inverted. Additionally,
the set value of the TQ0CCR0 register is transferred to the CCR0 buffer register.
cleared to 0000H, the output of the TOQ00 pin is inverted, and a compare match interrupt request signal
(INTTQ0CC0) is generated.
316
TQ0CTL0
TQ0CTL1
When the TQ0CE bit is set to 1, the value of the 16-bit counter is cleared from FFFFH to 0000H in synchronization
When the count value of the 16-bit counter matches the value of the CCR0 buffer register, the 16-bit counter is
The interval can be calculated by the following expression.
Interval = (Set value of TQ0CCR0 register + 1) × Count clock cycle
Note This bit can be set to 1 only when the interrupt request signals (INTTQ0CC0 and INTTQ0CCk) are
(a) TMQ0 control register 0 (TQ0CTL0)
(b) TMQ0 control register 1 (TQ0CTL1)
masked by the interrupt mask flags (TQ0CCMK0 and TQ0CCMKk) and the timer output (TOQ0k) is
performed at the same time. However, the TQ0CCR0 and TQ0CCRk registers must be set to the same
value (see 8.5.1 (2) (d) Operation of TQ0CCR1 to TQ0CCR3 registers) (k = 1 to 3).
TQ0CE
0/1
0
TQ0EST
Figure 8-4. Register Setting for Interval Timer Mode Operation (1/2)
0
0
TQ0EEE
CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
0/1
0
Note
Preliminary User’s Manual U18953EJ1V0UD
0
0
0
0
TQ0CKS2 TQ0CKS1 TQ0CKS0
TQ0MD2 TQ0MD1 TQ0MD0
0/1
0
0/1
0
0/1
0
Select count clock
0: Stop counting
1: Enable counting
0, 0, 0:
Interval timer mode
0: Operate on count
1: Count with external
clock selected by
TQ0CKS0 to TQ0CKS2 bits
event count input signal