UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 482

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

15.6.3 SBF transmission
SBF transmission is started by setting (to 1) the SBF transmission trigger (UAnOPT0.UAnSTT bit).
output.
Following the end of SBF transmission, the UAnSTT bit is automatically cleared. Thereafter, the UART transmission
mode is restored.
transmission trigger (UAnSTT bit) is set.
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When the UAnCTL0.UAnPWR bit = UAnCTL0.UAnTXE bit = 1, the transmission enabled status is entered, and
Thereafter, a low level the width of bits 13 to 20 specified by the UAnOPT0.UAnSLS2 to UAnOPT0.UAnSLS0 bits is
Transmission is suspended until the data to be transmitted next is written to the UAnTX register, or until the SBF
A transmission enable interrupt request signal (INTUAnT) is generated upon SBF transmission start.
TXDAn
INTUAnT
interrupt
Setting of UAnSTT bit
CHAPTER 15 ASYNCHRONOUS SERIAL INTERFACE A (UARTA)
1
2
Preliminary User’s Manual U18953EJ1V0UD
Figure 15-8. SBF Transmission
3
4
5
6
7
8
9
10
11
12
13
Stop
bit