UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 324

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

8.5.2
TQ0CTL0.TQ0CE bit is set to 1, and an interrupt request signal (INTTQ0CC0) is generated each time the specified
number of edges have been counted. The TOQ00 pin cannot be used.
324
TIQ00 pin
(external event
count input)
INTTQ0CC0 signal
TQ0CCR0 register
In the external event count mode, the valid edge of the external event count input is counted when the
Usually, the TQ0CCR1 to TQ0CCR3 registers are not used in the external event count mode.
16-bit counter
External event count mode (TQ0MD2 to TQ0MD0 bits = 001)
TQ0CE bit
Remark
FFFFH
0000H
This figure shows the basic timing when the rising edge is specified as the valid edge of the
external event count input.
External
event
count
interval
(D
Edge
detector
Figure 8-10. Basic Timing in External Event Count Mode
Figure 8-9. Configuration in External Event Count Mode
0
D
+ 1)
CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
0
TQ0CE bit
External
event
count
interval
(D
D
0
D
+ 1)
0
Preliminary User’s Manual U18953EJ1V0UD
0
External
event
count
interval
(D
0
D
+ 1)
0
CCR0 buffer register
TQ0CCR0 register
16-bit counter
TQ0CCR0 register
NTTQ0CC0 signal
(TIQ00 pin input)
Clear
External event
16-bit counter
count input
Match signal
D
0
− 1
D
D
0
INTTQ0CC0 signal
0
0000
0001