UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 496

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UPD70F3737GC-UEU-AX

Manufacturer Part Number
UPD70F3737GC-UEU-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3737GC-UEU-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Speed
20MHz
Number Of I /o
84
Core Processor
RISC
Program Memory Type
FLASH
Ram Size
8K x 8
Program Memory Size
128KB (128K x 8)
Data Converters
A/D 12x10b, D/A 2x8b
Oscillator Type
Internal
Peripherals
DMA, LVD, PWM, WDT
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3737GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
496
Remark
Baud Rate
To set the baud rate, perform the following calculation for setting the UAnCTL1 and UAnCTL2 registers (when
using internal clock).
<1> Set k to fxx/(2 × target baud rate) and m to 0.
<2> If k is 256 or greater (k ≥ 256), reduce k to half (k/2) and increment m by 1 (m + 1).
<3> Repeat Step <2> until k becomes less than 256 (k < 256).
<4> Round off the first decimal point of k to the nearest whole number.
<5> Set the value of m to UAnCTL1 register and the value of k to the UAnCTL2 register.
Example: When f
The representative examples of baud rate settings are shown below.
(bps)
153600
312500
625000
19200
31250
38400
76800
1200
2400
4800
9600
If k becomes 256 after round-off, perform Step <2> again to set k to 128.
300
600
f
ERR: Baud rate error (%)
XX
:
UAnCTL1 UAnCTL2
<1> k = 20,000,000/(2 × 153,600) = 65.10…, m = 0
<2>, <3> k = 65.10… < 256, m = 0
<4> Set value of UAnCTL2 register: k = 65 = 41H, set value of UAnCTL1 register: m = 0
Actual baud rate = 20,000,000/(2 × 65)
Baud rate error = {20,000,000/(2 × 65 × 153,600) − 1} × 100
08H
07H
06H
05H
04H
03H
02H
01H
01H
00H
00H
00H
00H
Main clock frequency
XX
CHAPTER 15 ASYNCHRONOUS SERIAL INTERFACE A (UARTA)
f
XX
= 20 MHz and target baud rate = 153,600 bps
82H
82H
82H
82H
82H
82H
82H
A0H
82H
82H
41H
20H
10H
= 20 MHz
Table 15-3. Baud Rate Generator Setting Data
= 153,846 [bps]
= 0.160 [%]
ERR (%)
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0
0.16
0.16
0.16
0
0
Preliminary User’s Manual U18953EJ1V0UD
UAnCTL1 UAnCTL2
07H
06H
05H
04H
03H
02H
01H
01H
00H
00H
00H
00H
00H
f
XX
D0H
D0H
D0H
D0H
D0H
D0H
D0H
80H
D0H
68H
34H
1AH
0DH
= 16 MHz
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0
0.16
0.16
0.16
−1.54
−1.54
ERR (%)
UAnCTL1 UAnCTL2
07H
06H
05H
04H
03H
02H
01H
00H
00H
00H
00H
00H
00H
f
XX
82H
82H
82H
82H
82H
82H
82H
A0H
82H
41H
21H
10H
08H
= 10 MHz
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0
0.16
0.16
−1.36
0
0
ERR (%)

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