UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 192

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

192
AD7 to AD0
WR1, WR0
Note This idle state (TI) does not depend on the BCC register settings.
Remark
Remarks 1. TASW (address setup wait): Image of high-level width of T1 state expanded.
A21 to A0
CLKOUT
HLDRQ
HLDAK
AD15 to AD0
Figure 5-15. Address Wait Timing (Separate Bus Read, Bus Size: 16 Bits, 16-Bit Access)
A21 to A0
2. TAHW (address hold wait): Image of low-level width of T1 state expanded.
3. The broken lines indicate high impedance.
The broken lines indicate high impedance.
CLKOUT
11
ASTB
WAIT
T1
RD
A1
10
Figure 5-14. Separate Bus Hold Timing (Bus Size: 8 Bits, Write)
T2
D1
T1
11
T1
A1
D1
CHAPTER 5 BUS CONTROL FUNCTION
A2
T2
10
Preliminary User’s Manual U18953EJ1V0UD
T2
D2
11
Undefined
TI
AD15 to AD0
Note
A21 to A0
CLKOUT
ASTB
WAIT
TH
RD
TH
TASW
TH
T1
TH
A1
TAHW
Undefined
D1
TI
Note
11
T2
T1
A3
10
T2
D3
11