UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 182

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

5.6.4
Address wait insertion is set for each memory block area (memory blocks 0 to 3).
address hold wait is inserted, it seems that the low-clock period of the T1 state is extended by 1 clock.
182
Address-setup or address-hold waits to be inserted in each bus cycle can be set by using the AWC register.
If an address setup wait is inserted, it seems that the high-clock period of the T1 state is extended by 1 clock. If an
(1) Address wait control register (AWC)
The AWC register can be read or written in 16-bit units.
Reset sets this register to FFFFH.
Cautions 1. Address setup wait and address hold wait cycles are not inserted when the internal ROM
Caution Be sure to set bits 15 to 8 to “1”.
Programmable address wait function
After reset:
2. Write to the AWC register after reset, and then do not change the set values. Also, do not
AWC
area, internal RAM area, and on-chip peripheral I/O areas are accessed.
access an external memory area until the initial settings of the AWC register are
complete.
AHW3
AHWn
ASWn
Memory block 3
15
FFFFH
1
0
1
0
1
7
Not inserted
Inserted
Not inserted
Inserted
ASW3
14
1
6
R/W
CHAPTER 5 BUS CONTROL FUNCTION
Preliminary User’s Manual U18953EJ1V0UD
Specifies insertion of address setup wait (n = 0 to 3)
Specifies insertion of address hold wait (n = 0 to 3)
AHW2
Memory block 2
13
Address:
1
5
ASW2
FFFFF488H
12
1
4
AHW1
Memory block 1
11
1
3
ASW1
10
1
2
AHW0
Memory block 0
9
1
1
ASW0
1
8
0