UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 715

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Item
LVI
Subclock oscillator
Internal oscillator
PLL
CPU
DMA
Interrupt controller
Timer P (TMP0 to TMP5)
Timer Q (TMQ0)
Timer M (TMM0)
Watch timer
Watchdog timer 2
Serial interface
A/D converter
D/A converter
Real-time output function (RTO)
Key interrupt function (KR)
CRC operation circuit
External bus interface
Port function
Internal data
Note Be sure to stop the PLL (PLLCTL.PLLON bit = 0).
Caution When the CPU is operating on the subclock and main clock oscillation is stopped, accessing a
register in which a wait occurs is disabled. If a wait is generated, it can be released only by reset
(see 3.4.8 (2)).
Setting of Low-Voltage
CSIB0 to CSIB4
I
UARTA0 to UARTA2
2
Table 21-12. Operating Status in Low-Voltage Subclock Operation Mode
C00 to I
Subclock Operation
2
C02
Mode
Operable
Oscillates
Oscillation enabled
Stops operation
Operable
Stops operation (must stop)
Operable
Stops operation
Stops operation
Operable when f
Operable when f
Operable when f
Stops operation
(When the SCKBn input clock is selected as the count clock, be sure to stop the
SCKBn input clock (n = 0 to 4).)
Stops operation
Stops operation
(When the ASCKA0 input clock to UARTA0 is selected, be sure to stop the ASCKA0
input clock.)
Stops operation
Stops operation (must stop)
Stops operation (output held)
Operable
Stops operation (must stop)
See 2.2 Pin States.
Settable
Settable
CHAPTER 21 STANDBY FUNCTION
Preliminary User’s Manual U18953EJ1V0UD
Note
R
XT
R
/8 or f
/8 or f
is selected as the count clock
Main Clock Is Stopped (Must Be Stopped)
XT
XT
is selected as the count clock
is selected as the count clock
Operating Status
715