UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 544

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

16.6.13 Reception error
the reception completion interrupt request signal (INTCBnR) is generated again when the next receive operation is
completed before the CBnRX register is read after the INTCBnR signal is generated, and the overrun error flag
(CBnSTR.CBnOVE) is set to 1.
if a reception error has occurred, the INTCBnR signal is generated again upon the next reception completion if the
CBnRX register is not read.
the next receive data from the INTCBnR signal generation.
544
SIBn pin capture
When transfer is performed with reception enabled (CBnCTL0.CBnRXE bit = 1) in the continuous transfer mode,
Even if an overrun error has occurred, the previous receive data is lost since the CBnRX register is updated. Even
To avoid an overrun error, complete reading the CBnRX register until one half clock before sampling the last bit of
(1) Operation timing
INTCBnR signal
CBnRX register
CBnRX register
Shift register
CBnOVE bit
read signal
SCKBn pin
(1) Start continuous transfer.
(2) Completion of the first transfer
(3) The CBnRX register cannot be read until one half clock before the completion of the second transfer.
(4) An overrun error occurs, and the reception completion interrupt request signal (INTCBnR) is
Remark
SIBn pin
timing
generated, and then the overrun error flag (CBnSTR.CBnOVE) is set to 1. The receive data is
overwritten.
n = 0 to 4
(1)
CHAPTER 16 3-WIRE VARIABLE-LENGTH SERIAL I/O (CSIB)
01H
02H
05H 0AH 15H 2AH 55H AAH 00H 01H 02H 05H 0AH 15H 2AH 55H
Preliminary User’s Manual U18953EJ1V0UD
(2)
AAH
(3)
(4)
55H