UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 740

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

24.4.2 To use for interrupt
740
<To start operation>
<1> Mask the interrupt of LVI.
<2> Select the voltage to be detected by using the LVIS.LVIS0 bit.
<3> Set the LVIM.LVION bit to 1 (to enable operation).
<4> Insert a wait cycle of 0.2 ms (max.) or more by software.
<5> By using the LVIM.LVIF bit, check if the supply voltage > detected voltage.
<6> Clear the interrupt request flag of LVI.
<7> Unmask the interrupt of LVI.
<To stop operation>
<1> By using the LVIM.LVIF bit, check if the supply voltage > detected voltage.
<2> Clear the LVION bit to 0.
Caution When the INTLVI signal is generated, confirm, by using the LVIM.LVIF bit, whether the INTLVI
LVI detected voltage
(2.80 V (TYP.))
Supply voltage (V
Internal reset signal
LVI detected signal
External RESETIC
detected voltage
(active low)
signal is generated due to a supply voltage drop or rise across the detected voltage.
INTLVI signal
RESET pin
LVION bit
Figure 24-3. Operation Timing of Low-Voltage Detector (LVIMD Bit = 0)
DD
)
CHAPTER 24 LOW-VOLTAGE DETECTOR (LVI)
Delay
Delay
Preliminary User’s Manual U18953EJ1V0UD
Clear
Delay
Time