UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 723

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

22.3 Operation
22.3.1 Reset operation via RESET pin
Main clock oscillator (f
Subclock oscillator (f
Internal oscillator
Peripheral clock (f
Internal system clock (f
CPU clock (f
CPU
Watchdog timer 2
Internal RAM
I/O lines (ports/alternate-function
pins)
On-chip peripheral I/O registers
Other on-chip peripheral functions
When a low level is input to the RESET pin, the system is reset, and each hardware unit is initialized.
When the level of the RESET pin is changed from low to high, the reset status is released.
Note When the power is turned on, the following pins may output an undefined level temporarily even during
Caution The OCDM register is initialized by the RESET pin input. Therefore, note with caution that, if a
• P10/ANO0 pin
• P11/ANO1 pin
• P53/SIB2/KR3/TIQ00/TOQ00/RTP03/DDO pin
reset.
CPU
high level is input to the P05/DRST pin after a reset release before the OCDM.OCDM0 bit is
cleared, the on-chip debug mode may be entered.
FUNCTIONS.
)
Item
X
to f
XT
X
)
X
)
CLK
/1,024)
),
Table 22-1. Hardware Status on RESET Pin Input
Oscillation stops
Oscillation continues
Oscillation stops
Operation stops
Operation stops
Initialized
Operation stops (initialized to 0)
Undefined if power-on reset or CPU access and reset input conflict (data is damaged).
Otherwise value immediately after reset input is retained.
High impedance
Initialized to specified status, OCDM register is set (01H).
Operation stops
Preliminary User’s Manual U18953EJ1V0UD
CHAPTER 22 RESET FUNCTIONS
During Reset
Note
For details, see CHAPTER 4
Oscillation starts
Oscillation starts
Operation starts after securing oscillation
stabilization time
Operation starts after securing oscillation
stabilization time (initialized to f
Program execution starts after securing
oscillation stabilization time
Counts up from 0 with internal oscillation
clock as source clock.
Operation can be started after securing
oscillation stabilization time
After Reset
XX
/8)
PORT
723