UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 104

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

104
(7) Port 5 function register (PF5)
Caution When an output pin is pulled up at EV
Note KRn and TIQ0m are alternate functions. When using the pin as the TIQ0m pin, disable KRn pin key
KR0/TIQ01
KR1/TIQ02
KR2/TIQ03
KR3/TIQ00
PFCE52
PFCE51
PFCE50
Pin Name
return detection, which is the alternate function. (Clear the KRM.KRMn bit to 0.) Also, when using the
pin as the KRn pin, disable TIQ0m pin edge detection, which is the alternate function (n = 0 to 3, m =
0 to 3).
0
0
1
1
0
0
1
1
0
0
1
1
After reset: 00H
PF5
PF5n
KRM.KRM0 bit = 0
KRM.KRM1 bit = 0
KRM.KRM2 bit = 0
KRM.KRM3 bit = 0
0
1
0
PFC52
PFC51
PFC50
0
1
0
1
0
1
0
1
0
1
0
1
Normal output (CMOS output)
N-ch open-drain output
Use as TIQ0m Pin
R/W
0
Control of normal output or N-ch open-drain output (n = 0 to 5)
Setting prohibited
TIQ03 input/KR2
TOQ03 input
RTP02 output
Setting prohibited
TIQ02 input/KR1
TOQ02 output
RTP01 output
Setting prohibited
TIQ01 input/KR0
TOQ01 output
RTP00 output
Preliminary User’s Manual U18953EJ1V0UD
CHAPTER 4 PORT FUNCTIONS
Address: FFFFFC6AH
PF55
Note
Note
Note
PF54
Specification of P52 pin alternate function
Specification of P51 pin alternate function
Specification of P50 pin alternate function
input
input
input
DD
TQ0IOC1. TQ0TIG2, TQ0IOC1. TQ0TIG3 bits = 0
TQ0IOC1.TQ0TIG4, TQ0IOC1.TQ0TIG5 bits = 0
TQ0IOC1.TQ0TIG6, TQ0IOC1.TQ0TIG7 bits = 0
TQ0IOC1.TQ0TIG0, TQ0IOC1.TQ0TIG1 bits = 0
TQ0IOC2.TQ0EES0, TQ0IOC2.TQ0EES1 bits = 0
TQ0IOC2.TQ0ETS0, TQ0IOC2.TQ0ETS1 bits = 0
or higher, be sure to set the PF5n bit to 1.
PF53
PF52
Use as KRn Pin
PF51
PF50