EP4SE530H35C2N Altera, EP4SE530H35C2N Datasheet - Page 245

• Manufacturer Part Number: EP4SE530H35C2N
• Description: IC STRATIX IV FPGA 530K 1152HBGA
• Manufacturer: Altera
• Series: STRATIX® IV Er

Specifications of EP4SE530H35C2N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 744
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-HBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Chapter 7: External Memory Interfaces in Stratix IV Devices
Memory Interfaces Pin Support
Figure 7–20. DQS Pins in Stratix IV I/O Banks
February 2011 Altera Corporation
PLL_L4
DQS17L
DQS18L
DQS34L
DQS1L
PLL_L1
PLL_L2
PLL_L3
DLL1
DLL0
1
1A
1C
2B
1B
2C
2A
DQS1B
DQS38T
The parity, DM, BWSn, NWSn, ECC, and QVLD pins are shown as DQ pins in the pin
table.
The numbering scheme starts from the top-left corner of the device going
counter-clockwise in a die-top view.
numbered in a die-top view of the device. The top and bottom sides of the device can
contain up to 38 ×4 DQS/DQ groups. The left and right sides of the device can contain
up to 34 ×4 DQS/DQ groups.
8A
3A
8B
3B
8C
3C
DQS20T
DQS19B
PLL_T1
PLL_B1
Stratix IV Device
PLL_T2
PLL_B2
Figure 7–20
DQS19T
DQS20B
7C
4C
shows how the DQS/DQ groups are
7B
4B
Stratix IV Device Handbook Volume 1
7A
4A
DQS38B
DQS1T
6A
6B
6C
5A
5C
5B
DLL2
DLL3
PLL_R2
PLL_R3
DQS34R
DQS18R
DQS17R
DQS1R
PLL_R4
PLL_R1
7–25