EP4SE530H35C2N Altera, EP4SE530H35C2N Datasheet - Page 939

• Manufacturer Part Number: EP4SE530H35C2N
• Description: IC STRATIX IV FPGA 530K 1152HBGA
• Manufacturer: Altera
• Series: STRATIX® IV Er

Specifications of EP4SE530H35C2N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 744
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-HBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Chapter 5: Dynamic Reconfiguration in Stratix IV Devices
Functional Simulation of the Dynamic Reconfiguration Process
Figure 5–40. Resource Utilization in the ALTGX_RECONFIG MegaWizard Plug-In Manager
Functional Simulation of the Dynamic Reconfiguration Process
February 2011 Altera Corporation
Figure 5–40
Plug-In Manager.
This section describes the points to be considered during functional simulation of the
dynamic reconfiguration process.
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You must connect the ALTGX_RECONFIG instance to the
ALTGX_instance/ALTGX instances in your design for functional simulation.
The functional simulation uses a reduced timing model for offset cancellation.
Therefore, the duration of the offset cancellation process is 16 reconfig_clk clock
cycles for functional simulation only.
The gxb_powerdown signal must not be asserted during the offset cancellation
sequence (for functional simulation and silicon).
shows resource utilization in the ALTGX_RECONFIG MegaWizard
Stratix IV Device Handbook Volume 2: Transceivers
5–93