EP4SE530H35C2N Altera, EP4SE530H35C2N Datasheet - Page 462

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EP4SE530H35C2N

Manufacturer Part Number
EP4SE530H35C2N
Description
IC STRATIX IV FPGA 530K 1152HBGA
Manufacturer
Altera
Series
STRATIX® IV Er

Specifications of EP4SE530H35C2N

Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
744
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-HBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

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1–18
Figure 1–13. FPGA Fabric-Transceiver Interface and Transceiver PMA-PCS Interface
Table 1–6. FPGA Fabric-Transceiver Interface Width and Transceiver PMA-PCS Widths (Part 1 of 2)
Stratix IV Device Handbook Volume 2: Transceivers
PMA-PCS interface widths
FPGA fabric-transceiver interface width
FPGA
Fabric
f
1
Fabric-Transceiver
Interface
Name
FPGA
Each regular Stratix IV GT transceiver channel can be categorized into:
The PCIe hard IP-transceiver interface is beyond the scope of this chapter. This
chapter describes the FPGA fabric-transceiver interface.
For more information about the PCIe hard IP block, refer to the
User
Figure 1–13
interface.
The transceiver channel datapath can be divided into the following two modes based
on the FPGA fabric-transceiver interface width (channel width) and the transceiver
channel PMA-PCS width (serialization factor):
Table 1–6
transceiver PMA-PCS widths (serialization factor) allowed in single-width and
double-width modes.
8G transceiver channel—supports data rates between 600 Mbps and 8.5 Gbps
10G Transceiver Channel—supports data rates between 600 Mbps and 11.3 Gbps
Single-width mode
Double-width mode
Guide.
lists the FPGA fabric-transceiver interface widths (channel width) and
Compensation
wrclk
TX Phase
shows the FPGA fabric-transceiver interface and transceiver PMA-PCS
FIFO
rdclk
FPGA Fabric
Byte Serializer
wrclk
Receiver Channel PCS
Transmitter Channel PCS
Single-Width
rdclk
16/20 bit
8/10 bit
8/10 bit
PMA-PCS Interface
8B/10B Encoder
Chapter 1: Transceiver Architecture in Stratix IV Devices
February 2011 Altera Corporation
Double-Width
PCI Express Compiler
PMA-PCS
Transceiver Block Architecture
Interface
16/20 bit
16/20 bit
32/40 bit
Transmitter Channel
Receiver Channel
PMA
PMA

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