upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 125

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upd70f3017ay

Manufacturer Part Number
upd70f3017ay
Description
V850/sa1tm 32-/16-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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5.3.5 In-service priority register (ISPR)
acknowledged, the bit of this register corresponding to the priority level of that interrupt is set to 1 and remains set
while the interrupt is serviced.
automatically reset to 0 by hardware. However, it is not reset when execution is returned from non-maskable interrupt
processing or exception processing.
After reset: 00H
Symbol
ISPR
This register holds the priority level of the maskable interrupt currently acknowledged. When an interrupt request is
When the RETI instruction is executed, the bit corresponding to the interrupt request having the highest priority is
This register is read-only in 8-bit or 1-bit units.
Caution Read the ISPR register with interrupts disabled. When the ISPR register is read with interrupts
Remark
ISPR7
ISPRn
enabled, a normal value may not be read if the interrupt acknowledgement timing and the bit
reading timing conflict.
7
0
1
R
n: 0 to 7 (priority level)
Interrupt request with priority n not acknowledged
Interrupt request with priority n acknowledged
ISPR6
6
CHAPTER 5 INTERRUPT/EXCEPTION PROCESSING FUNCTION
ISPR5
Indicates Priority of Interrupt Currently Acknowledged
5
User’s Manual U12768EJ4V1UD
Address: FFFFF166H
ISPR4
4
ISPR3
3
ISPR2
2
ISPR1
1
ISPR0
0
125

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