upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 482

• Manufacturer Part Number: upd70f3017ay
• Description: V850/sa1tm 32-/16-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

[I]
I
I
I
I
I
IC -----------------------------------------------------------------54
ID flag --------------------------------------------------------- 126
IDLE mode --------------------------------------------------- 147
Idle state insertion function --------------------------------95
IIC clock select register 0 -------------------------------- 241
IIC control register 0 --------------------------------------- 234
IIC function expansion register 0 ----------------------- 241
IIC shift register 0 ----------------------------------- 231, 242
IIC status register 0 ---------------------------------------- 238
IIC0 ------------------------------------------------------------ 242
IICC0 ---------------------------------------------------------- 234
IICCL0 -------------------------------------------------------- 241
IICS0 ---------------------------------------------------------- 238
IICX0 ---------------------------------------------------------- 241
Illegal opcode ----------------------------------------------- 129
Image -----------------------------------------------------------67
Input voltage and conversion result -------------------- 318
In-service priority register -------------------------------- 125
INTC -------------------------------------------------------------35
Integral linearity error -------------------------------------- 329
Internal block diagram ---------------------------------------34
Internal flash memory area ---------------------------------70
Internal RAM area -------------------------------------------73
Internal ROM area -------------------------------------------70
Internal unit -----------------------------------------------------35
Internal verify flow ------------------------------------------ 430
Interrupt control register ---------------------------------- 122
Interrupt control register bit manipulation instructions
Interrupt controller -------------------------------------------35
Interrupt latency time -------------------------------------- 135
Interrupt request (INTIIC0) generation timing and wait
Interrupt request signal generator ---------------------- 232
Interrupt request valid timing after EI instruction ---- 136
Interrupt signal generator --------------------------------- 232
Interrupt source list ----------------------------------------- 107
Interrupt source register ------------------------------------62
Interrupt status saving registers --------------------------62
Interrupt/exception processing function --------------- 106
Interrupt/exception table ------------------------------------72
Interval timer ---------------------------- 166, 197, 205, 211
Interval timer mode ---------------------------------------- 214
482
2
2
2
2
2
C bus -------------------------------------------------------- 228
C bus definitions and control methods --------------- 244
C bus mode ------------------------------------------------ 228
C bus mode function ------------------------------------- 243
C interrupt request --------------------------------------- 251
during DMA transfer------------------------------------- 137
control------------------------------------------------------- 269
User’s Manual U12768EJ4V1UD
APPENDIX D INDEX
INTP0 to INTP6 ---------------------------------------------- 44
Introduction----------------------------------------------------- 27
ISPR ---------------------------------------------------------- 125
[L]
LBEN ------------------------------------------------------------ 50
[M]
Main clock oscillator --------------------------------------- 138
MAM ------------------------------------------------------------ 78
Maskable interrupts --------------------------------------- 115
Master operation-------------------------------------------- 277
Memory address output mode register ----------------- 78
Memory block function ------------------------------------- 92
Memory boundary operation condition --------------- 105
Memory expansion mode register ----------------------- 77
Memory map -------------------------------------------------- 69
MM -------------------------------------------------------------- 77
Multiple interrupt ------------------------------------------- 132
[N]
NMI -------------------------------------------------------------- 44
NMI status saving registers ------------------------------- 62
Noise elimination of external interrupt request input pin113
Non-maskable interrupt ---------------------------------- 109
Non-port pins -------------------------------------------------- 41
NP flag -------------------------------------------------------- 113
[O]
Off-board programming ---------------------------------- 399
On-board programming ---------------------------------- 399
On-chip peripheral I/O area ------------------------------- 74
One-shot pulse output ------------------------------------ 179
Operation in power save mode --------------------------- 97
Operation mode ---------------------------------------------- 65
Operation mode registers 0 to 2 ----------------------- 223
Operation stop mode -----------221, 225, 228, 286, 294
Ordering information ----------------------------------------- 30
Oscillation stabilization time ----------------------------- 150
Oscillation stabilization time select register ---143, 215
OSTS -------------------------------------------- 143, 215, 220
Outline of self-programming ----------------------------- 413
Outline of self-programming interface ----------------- 415
Output latch -------------------------------------------------- 342
Overall error-------------------------------------------------- 326
[P]
P0 -------------------------------------------------------------- 348
P00 to P07 ----------------------------------------------------- 44