upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 127

• Manufacturer Part Number: upd70f3017ay
• Description: V850/sa1tm 32-/16-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

5.4 Software Exceptions
acknowledged.
5.4.1 Operation
routine.
A software exception is generated when the CPU executes the TRAP instruction, and can be always
• TRAP instruction format: TRAP vector (where vector is 0 to 1FH)
For details of the instruction function, refer to the V850 Series Architecture User’s Manual.
If a software exception occurs, the CPU performs the following processing, and transfers control to the handler
(1) Saves the restored PC to EIPC.
(2) Saves the current PSW to EIPSW.
(3) Writes an exception code to the lower 16 bits (EICC) of ECR (interrupt source).
(4) Sets the EP and ID bits of PSW.
(5) Loads the handler address (00000040H or 00000050H) of the software exception routine in the PC, and
How a software exception is processed is shown below.
transfers control.
CPU processing
CHAPTER 5 INTERRUPT/EXCEPTION PROCESSING FUNCTION
Figure 5-10. Software Exception Processing
EIPC
EIPSW
ECR.EICC
PSW.EP
PSW.ID
PC
Exception processing
User’s Manual U12768EJ4V1UD
TRAP instruction
restored PC
PSW
exception code
1
1
handler address
Handler address:
00000040H (vector = 0nH)
00000050H (vector = 1nH)
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