upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 349

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upd70f3017ay

Manufacturer Part Number
upd70f3017ay
Description
V850/sa1tm 32-/16-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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(1) Function of P0 pins
(2) Noise elimination
Port 0
Port 0 includes the following alternate functions.
Note Software pull-up function
Port 0 is an 8-bit I/O port for which I/O settings can be controlled in 1-bit units. I/O settings are controlled via the
port 0 mode register (PM0).
In output mode, the values set to each bit are output to port 0 (P0). When using this port in output mode, either
the valid edge of each interrupt request should be made invalid or each interrupt request should be masked
(except for NMI requests).
When using this port in input mode, the pin statuses can be read by reading P0. Also, the P0 register (output
latch) values can be read by reading P0 while in output mode.
The valid edge of NMI and INTP0 to INTP6 are specified via rising edge specification register 0 (EGP0) and falling
edge specification register 0 (EGN0).
A pull-up resistor can be connected in 1-bit units when specified via pull-up resistor option register 0 (PU0).
When a reset is input, the settings are initialized to input mode. Also, the valid edge of each interrupt request
becomes invalid (NMI and INTP0 to INTP6 do not function immediately after reset).
(a) Elimination of noise from NMI and INTP0 to INTP3 pins
(b) Elimination of noise from INTP4 to INTP6, ADTRG, and RTPTRG pins
An on-chip noise eliminator uses analog delay to eliminate noise. Consequently, if a signal having a constant
level is input for longer than a specified time to these pins, it is detected as a valid edge. Such edge detection
occurs after the specified amount of time.
A digital noise eliminator is provided on chip.
This circuit uses digital sampling. A pin’s input level is detected using a sampling clock (f
elimination is performed if the same level is not detected three times consecutively.
Pin Name
P00
P01
P02
P03
P04
P05
P06
P07
INTP0
INTP1
INTP2
INTP3
INTP4/ADTRG
INTP5/RTPTRG
INTP6
NMI
Alternate Function
Table 14-2. Alternate Functions of Port 0
CHAPTER 14 PORT FUNCTION
User’s Manual U12768EJ4V1UD
I/O
I/O
PULL
Yes
Note
Analog noise elimination
Digital noise elimination
Remark
xx
), and noise
349

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