upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 491

• Manufacturer Part Number: upd70f3017ay
• Description: V850/sa1tm 32-/16-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

4th
edition
Edition
Addition of description to minimum instruction execution time in 3.1 Features
Change of description in 3.2.2 (2) Program status word (PSW)
Modification of Figure 3-16 Recommended Memory Map
Addition of description in 3.4.8 Peripheral I/O registers
Addition and modification of description in 3.4.9 Specific registers
Addition of description in 5.2.4 Noise elimination of external interrupt request input
pin
Addition of description in 5.2.5 Edge detection function of external interrupt request
input pin
Addition to Cautions in 5.3.4 Interrupt control register (xxICn)
Addition of Caution in 5.3.5 In-service priority register (ISPR)
Addition of 5.8.1 Interrupt request valid timing after EI instruction
Addition of 5.9 Bit Manipulation Instruction of Interrupt Control Register During DMA
Transfer
Modification of description in 6.1 (1) Main clock oscillator
Modification of description in 6.1 (2) Subclock oscillator
Modification of Figure 6-1 Clock Generator
Addition to Notes in 6.3.1 (1) Processor clock control register (PCC)
Modification of description in 6.3.1 (1) (b) Example of subclock operation →main clock
operation setup
Addition to Notes and Cautions in 6.3.1 (2) Power save control register (PSC)
Modification of description in 6.4.4 (1) Settings and operating states
Addition of 6.6 Notes on Power Save Function
Modification of Caution in 7.1.3 (2) Capture/compare registers 00, 10 (CR00, CR10)
Modification of Caution in 7.1.3 (3) Capture/compare registers 01, 11 (CR01, CR11)
Change of Figure 7-27 Data Hold Timing of Capture Register
Addition of 7.2.7 (6) (c) One-shot output function
Addition of 7.3.1 Outline
Change of Caution in 7.3.4 (2) 8-bit timer mode control registers 2 to 5 (TMC2 to
TMC5)
Modification of description in 10.3.2 (3) IIC clock select register 0 (IICCL0), IIC function
expansion register 0 (IICX0)
Addition of Figures 10-25 to 10-29
Modification in 11.3 (1) A/D converter mode register (ADM)
Addition of Table 11-2 A/D Conversion Time Selection
Addition of 11.6 How to Read A/D Converter Characteristics Table
Change of description in 12.1 Functions
Deletion of 12.2 Transfer Completion Interrupt Request and addition of 12.2 Features
Major Revision from Previous Edition
APPENDIX E REVISION HISTORY
User’s Manual U12768EJ4V1UD
CHAPTER 3 CPU
FUNCTIONS
CHAPTER 5
INTERRUPT/EXCE
PTION
PROCESSING
FUNCTION
CHAPTER 6
CLOCK
GENERATION
FUNCTION
CHAPTER 7
TIMER/COUNTER
FUNCTION
CHAPTER 10
SERIAL
INTERFACE
FUNCTION
CHAPTER 11 A/D
CONVERTER
CHAPTER 12
DMA FUNCTIONS
Applied to:
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