upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 140

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upd70f3017ay

Manufacturer Part Number
upd70f3017ay
Description
V850/sa1tm 32-/16-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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6.3.1 Control registers
(1) Processor clock control register (PCC)
140
After reset:
PCC
This is a specific register. It can be written to only when a specified combination of sequences is used (see 3.4.9
Specific registers). This register can be read/written in 8-bit or 1-bit units.
Notes 1. If manipulating CK2, do so in 1-bit units. In the case of 8-bit manipulation, do not change the
Cautions 1. While CLKOUT is being output, do not change the CPU clock (the value of the
Remark
03H
CK2
MFRC
MCK
7
0
1
0
1
0
0
0
0
0
1
Note1, 2
2. When the CPU operates on the subclock (CK2 = 1), do not set the software STOP mode.
X: don’t care
values of CK1 and CK0.
2. Even if the MCK bit is set to 1 during main clock operation, the main clock is not
3. Always set bits 3, 4, and 7 to 0.
4. Leakage current can be reduced by avoiding the use of the main clock’s on-chip
R/W
Operating
Stopped
Use
Do not use
CK2 to CK0 in the PCC register).
stopped. The CPU clock stops after the subclock is selected.
feedback resistor (MFRC = 1) while the external clock is operating. However, the
leakage current cannot be reduced during the oscillation stabilization time,.
MCK
CK1
X
6
0
0
1
1
CHAPTER 6 CLOCK GENERATION FUNCTION
Address: FFFFF074H
MFRC
CK0
0
1
0
1
X
User’s Manual U12768EJ4V1UD
5
Selection of Internal Feedback Resistor for Main Clock
f
f
f
f
f
XX
XX
XX
XX
XT
/2
/4
/8
(subclock)
4
0
Operation of Main Clock
3
0
Selection of CPU Clock
CK2
2
CK1
1
CK0
0

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