upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 160

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upd70f3017ay

Manufacturer Part Number
upd70f3017ay
Description
V850/sa1tm 32-/16-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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(2) Capture/compare control registers 0, 1 (CRC0, CRC1)
160
CRCn controls the operation of capture/compare register n (CRn0 and CRn1).
CRCn is set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears CRC0 and CRC1 to 00H.
Cautions 1. Before setting CRCn, be sure to stop the timer operation.
(n = 0, 1)
After reset: 00H R/W
CRCn
3.
4.
5.
2. When the mode in which the timer is cleared and started on a match between TMn and
CRn0 is selected by 16-bit timer mode control register n (TMCn), do not specify CRn0 as
a capture register.
When both the rising edge and falling edge are specified for the TIn0 valid edge, the
capture operation does not work.
To ensure that the capture trigger captures the signals from TIn0 and TIn1 correctly, a
pulse longer than two of the count clocks selected by prescaler mode registers n and n1
(PRMn, PRMn1) is required.
Be sure to set bits 3 to 7 to 0.
CRCn2
CRCn1
CRCn0
7
0
0
1
0
1
0
1
Operates as compare register
Operates as capture register
Captured at valid edge of TIn1
Captured in reverse phase of valid edge of TIn0
Operates as compare register
Operates as capture register
6
0
CHAPTER 7 TIMER/COUNTER FUNCTION
User’s Manual U12768EJ4V1UD
5
0
Address: FFFFF20AH, FFFFF21AH
Selection of Operation Mode of CRn1
Selection of Operation Mode of CRn0
Selection of Capture Trigger of CRn0
4
0
3
0
CRCn2
2
CRCn1
1
CRCn0
0

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